000			01672cam a2200373 a 4500
001			16284731
005			20231003082500.0
008			100615s2010 nyua b 001 0 eng
010			_a 2010022678
015			_aGBB011406 _2bnb
016	7		_a015478365 _2Uk
020			_a9780071635196 (alk. paper)
020			_a007163519X (alk. paper)
035			_a(OCoLC)ocn426811674
040			_aDLC _cEC-QuPUC _dDLC _bspa _erda _fPamela Vega
041			_aenm
082	0	0	_a621.395 _222
100	1		_aKundu, Sandip.
245	1	0	_aNanoscale CMOS VLSI circuits : _bdesign for manufacturability / _cSandip Kundu, Aswin Sreedhar
246	1	4	_aNanoscale complementary metal oxide semiconductor very large-scale integration circuits
264		1	_aNew York : _bMcGraw-Hill, _c2010.
300			_axv, 296 p. : _bill. ; _c24 cm.
336			_atxt
337			_an
338			_anc
504			_aIncludes bibliographical references and index.
505	0		_aSemiconductor manufacturing -- Process and device variability : analysis and modeling -- Manufacturing-aware physical design closure -- Metrology, manufacturing defects, and defect extraction -- Defect impact modeling and yield improvement techniques -- Physical design and reliability -- Design for manufacturability : tools and methodologies.
650		0	_aMetal oxide semiconductors, Complementary _xDesign and construction.
650		0	_aIntegrated circuits _xVery large scale integration _xDesign and construction
650		0	_aNanoelectronics.
700	1		_aSreedhar, Aswin.
856			_uhttps://www.accessengineeringlibrary.com/content/book/9780071635196
942			_cEBK
999			_c286283 _d286281